One of the most mature domains included in the current system is the synchronous dataflow (SDF) domain [B1, B2]. This domain is used for signal processing and communications algorithm development, and has particularly good support for multirate algorithms [B3].
A dynamic data flow (DDF) domain extends the SDF domain by allowing data-dependent flow of control, as in Blosim. Boolean dataflow (BDF) [B4, B5, B6] has a compile-time scheduler for dynamic dataflow graphs [B7].
Several code-generation domains use dataflow semantics [B8, B9]. These domains are capable of synthesis of C code, assembly code for certain programmable DSPs [B10], VHDL, and Silage [B11]. A significant part of the research that led to the development of these domains has been concerned with synthesizing code that is efficient enough for embedded systems [B12, B13, B14, B15, B16, B5, B6]. A large amount of effort has also been put into the automatic parallelization of the code [B17, B18, B19, B20], and on parallel architectures that take advantage of it [B21, B22].
A number of simulation domains with discrete-event (DE) semantics has been developed for MLDesigner, but the DE domain is the only pure discrete event domain released with MLDesigner. The DE domain is a generic discrete-event modeling environment useful for simulating queuing systems, communication networks, and hardware systems.
The software analogy of synchronous digital circuits has been realized by Stephen Edwards in the Synchronous Reactive (SR) domain [B23]. This model of computation is better suited than data flow to control-intensive applications and is more efficient than DE.
Another approach to design control-intensive applications is to mix Finite State Machines (FSM) domain with data flow, DE, or other domains. FSMs give you the ability to mix timed and untimed domains into hierarchical systems.